lab name
Citation information can be found at Dr. Mishra's Google Scholar Page.

2018
  1. N. Jain and Biswajit Mishra, "A Light-Weight Configurable Architecture for QRS Detection," in IET Computer and Digital Techniques 2018.[accepted, in press]
  2. C. Chothani and Biswajit Mishra, "Fully Digital, Low Energy Capacitive Sensor Interface with an Auto-Calibration Unit," in IEEE Conference on VDAT, Madurai, India 2018.[in press]
  3. P Patel, Biswajit Mishra and Dipankar NagChoudhuri, "A 46nW Power Management Unit with Battery Extender for Solar Energy Harvesters using 0.18um CMOS," in J. Low Power Electron. 14, 257-265 (2018) https://doi.org/10.1166/jolpe.2018.1557
  4. N. Jain, M. Singh and B. Mishra, "Image Compression using 2D-Discrete Wavelet Transform on a Light-Weight Reconfigurable Hardware," in IEEE Int. Conf. on VLSI Design (VLSID-2018), Pune, India. pp.61-66 DOI:10.1109/VLSID.2018.38
2017
  1. A. Pokhara, J. Agrawal and B. Mishra, "Design of an All Digital, Low Power TDC in 0.18um CMOS" in IEEE Int. Symposium on Embedded computing and system Design, 2017, India. DOI: 10.1109/ISED.2017.8303944
  2. B. Mishra and N. Thakkar, "Cuffless Blood Pressure Monitoring using PTT and PWV Methods," in IEEE Int. Conf. on Recent Innovations in Signal proc. and Emb. systems (RISE-2017), Bhopal, India. DOI: 10.1109/RISE.2017.8378188
  3. A. Pokhara, J. Agrawal and B. Mishra, "Design of an All Digital, Low Power TDC in 0.18um CMOS for Space Applications" in Cadence Design Contest, India.
  4. P Patel, Biswajit Mishra and Dipankar NagChoudhuri, "A 36nW Power Management Unit for Solar Energy Harvesters using 0.18um CMOS," in IEEE Conference on VDAT, Roorkee, India 2017. https://doi.org/10.1007/978-981-10-7470-7_47
2016
  1. Ankur Pokhara and Biswajit Mishra, "Design Methodology for an Energy Neutral Health Monitoring Wireless Sensor Node," in IEEE Int. Int. Symposium on Embedded computing and system Design, 2016. DOI: 10.1109/ISED.2016.7977103
  2. B. Bathiya, S. Srivastava, B.Mishra, "Air Pollution Monitoring using Wireless Sensor Network," in IEEE-ACM WiECON-ECE Conference, 2016. [Best Paper Award] DOI: 10.1109/WIECON-ECE.2016.8009098
  3. C. Botteron, P. Janphuang, B. Mishra, G. Tasselli, F.J. Haug, D. Briand, A. Skrivervik, N.F. deRooij, P.A. Farine, "UWB-Sensor node for smart building applications powered by piezoelectric harvesters or solar cells" Sensors and Actuators A: Physical, 239, 127-136, 2016
  4. S Kasodniya, B. Mishra and N. Desai, "Ultra Low Power Capacitive Power Management Unit in 0.18um CMOS", IEEE VLSI-SATA Conference, pp. 1-6, 2016.
  5. V. Sharma, N. Jain and B. Mishra, "Fully-Digital Time based ADC/TDC in 0.18um CMOS", IEEE VLSI-SATA Conference, pp. 1-6, 2016.
  6. J Shah and B Mishra, "Customized IoT enabled Wireless Sensing and Monitoring Platform for Smart Buildings", Elsevier Procedia Technology, 2016.
  7. J Shah and B Mishra, "IoT enabled Environmental Monitoring System for Smart Cities", IEEE Internet of Things and Applications Conference, pp. 1-6, 2016.
  8. J Shah and B Mishra, "Customized IoT enabled Wireless Sensing and Monitoring Platform for Preservation of Artwork in Heritage Buildings" IEEE WispNet Conference, pp. 1-6, 2016.
2015
  1. B. Mishra, P. Wilson and R. Wilcock, "A Geometric Algebra Co-Processor for Color Edge Detection," Electronics, 4(1), 94-117, 2015. doi: 10.3390/electronics4010094
  2. B Mishra “Internet of Things enabled Microclimate Monitoring System”, IISF (TIFAC-DST), New Delhi, India Dec 2015 [Best Oral Paper Award in the Climate Track]
  3. N. Jain and B. Mishra, "DCT and CORDIC on a Novel Configurable Hardware", IEEE Conference on PrimeAsia, 2015. [Bronze Leaf Award] (available in IEEExplore)
  4. S Tripathi, N Jain and B Mishra, "Ultra-Low Power 128 byte Memory Design based on D-latch in 0.18 um process", >IEEE Conference on PrimeAsia, 2015. (available in IEEExplore)
  5. N. Jain and B. Mishra, "CORDIC on a configurable serial architecture for biomedical signal processing applications", IEEE 19th International Symposium on VLSI Design and Test (VDAT), 2015. (available in IEEExplore)
  6. N. Jain and B. Mishra, "QRS Detection Algorithm on a Novel Reconfigurable Multiplierless Architecture", IEEE ICIC 2015 (available in IEEExplore)
  7. A. Savaliya and B. Mishra, "A 0.3V , 12nW, 47fJ/conv, Fully Digital Capacitive Sensor Interface in 0.18um CMOS", IEEE VLSI-SATA, Bangalore, India, 2015 link (available in IEEExplore)
2014
  1. C. Patel and B. Mishra, "All Digital Delay-line based Ultra Wide Band Transmitter Architecture in 0.18um CMOS", IEEE ICIIS, Gwalior, India, 2014 link (available in IEEExplore).
  2. Mishra, B. , Kochery, M. , Wilson, P. and Wilcock, R. (2014) A Novel Signal Processing Coprocessor for n-Dimensional Geometric Algebra Applications. Circuits and Systems, 5, 274-291. doi: 10.4236/cs.2014.511029.
2013
  1. B. Mishra, C. Botteron, G. Tasselli, C. Robert and P. A Farine. "A Sub uA Power Management Circuit in 0.18um CMOS for Energy Harvesters ",IEEE DATE. Grenoble, France, 2013 link (available in IEEExplore).
  2. Ultra Low Power Design Efforts for Energy Harvesters at IIIT, Bangalore, Feb 2013 [Invited]
  3. Ultra Low Power Design Efforts for Energy Harvesters at IIIT, New Delhi, Feb 2013 [Invited]
  4. Ultra Low Power Design Efforts for Energy Harvesters at Univ. of Innsbruck, Austria Jan 2013 [Invited]
2012
  1. B. Mishra, C. Botteron and P.A. Farine, "MICS Energy Harvesting UWB Sensor Node: A Design Approach", MICS, Switzerland, 2012 [Invited]
  2. B. Mishra, C. Botteron, G. Tasselli, C. Robert, P.A. Farine. J. Pattanaphong, D. Briand and N. deRooij. "A Sub 100uW Autonomous UWB-Sensor Node Powered by Piezoelectric Vibration Harvester", IEEE ICWITS, Hawaii, USA, 2012 link (available in IEEExplore)
  3. J. Pattanaphong, B. Mishra, D. Briand and N. deRooij, G. Tasselli, C. Robert, C. Botteron, P.A. Farine. "Realization of Autonomous UWB Sensor Powered by Piezoelectric Energy Harvester", PowerMEMS 2012, Atlanta, USA. 2012. [Best Paper Award].
2011
  1. B. Mishra, C. Botteron, P.A. Farine and B. M. Al-Hashimi. "Ultra Low Power Multi-Operand Adder Architecture for Subthreshold Circuits", In: Proc. of the IEEE 54th Int. Midwest Symp on Circuits and Systems (MWSCAS 2011), Seoul, Korea, Aug 7-10, 2011. link (available in IEEExplore).
  2. B. Mishra, C. Boterron, and Pierre A. Farine. (2011) A 120 mV Startup Circuit based on Charge Pump for Energy Harvesting Circuits. IEICE Electron. Express. Vol. 8 (11):830-834. 2011. doi: 10.1587/elex.8.830
2010
  1. B. Mishra, C. Botteron, P.A. Farine, "Power Management Circuits for Micro Energy Harvesters," In: NanoTera Workshop in Autonomous Systems and Self Configurable Networks at Interlaken, Switzerland, [Invited], Dec 02-03, 2010 2010.
2009
  1. B. Mishra, B. M. Al-Hashimi, and M. Zwolinski, "Variation Resilient Adaptive Controller for Subthreshold Circuits," in IEEE DATE 2009, Nice, France, 2009, [nominated for Best Paper Award]. link (available in IEEExplore)
2008
  1. B. Mishra, P. Wilson, and B. M. Al-Hashimi, "Advancement in Color Image Processing Using Geometric Algebra," in Proc. of the 16th Euro Signal Proc Conf, EUSIPCO 2008, Lausanne, Switzerland, Aug 2008.
  2. B. Mishra, "Ultra Low Power Energy Harvesting Computation Methodology for Digital Signal Processing applications," Univ. of Southampton, UK, Tech. Report, Feb 2008.
2007
  1. B. Mishra, "Investigation into Floating Point Geometric Algebra Processor," PhD thesis, University of Southampton, Southampton, UK, 2007.
2006
  1. B. Mishra and P. Wilson, "Color Edge Detection Hardware based on Geometric Algebra," Visual Media Production, 2006. CVMP 2006. 3rd Europ. Conf on, London, UK pp. 115-121, Nov. 2006. link (available in IEEExplore).
  2. Workshop on challenges and visions in Computer Graphics Workshop - Geometric Computing hardware solution at Darmstadt, Fraunhofer IGD, July 3rd - 4th, 2006. [Invited]
2005
  1. B. Mishra and P. Wilson, "Hardware Implementation of a Geometric Algebra Processor Core." in IMACS International Conference on Applications of Computer Algebra, Nara, Japan, 2005.
  2. B. Mishra and P. Wilson, "VLSI Implementation of a Geometric Algebra Micro Architecture-GAMA." in International Conference on Clifford Analysis and Applications, Toulouse, France, 2005.
  3. B. Mishra and P. Wilson, "VLSI Implementation of a Geometric Algebra Micro Architecture," in IEEE PREP 2005, Lancaster, United Kingdom, 2005, pp. 50-51.
  4. Cadence Master Class Workshop - Digital Design Flow in ST 0.12um Technology at School of Electronics and Computer Science, Univ. of Southampton, UK, Aug 12 2005. [Invited]
2004
  1. B. Mishra, "Analysis and Design of a Generic Reconfigurable Coarse Core," Master's thesis, University of Southampton, Southampton, UK.
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