Summary of Research Interests
(Note for DAIICT students interested in working on Neuromorphic hardware projects)
|Conferences & Workshops Attended||Other Professional Activities||Researh Projects|
|Awards and Scholarships||Personal Info||Useful Links|
Mazad S. Zaveri (Ph.D.)Assistant Professor
Dhirubhai Ambani Institute of Information and Communication Technology (DA-IICT),
Near Indroda Circle,
Gandhinagar - 382007,
Office Location: Room No.4206, Faculty Block - 4
Office Ph: 91-079-30510638
Office Time: M-F: 9 am to 6 pm
Office Hours: Check my daily schedule
Email: mazad_zaveri<AT>daiict <DOT>ac<DOT>in
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|Webpages of researchers working on
Cortex-inspired or Neuromorphic hardware platforms, etc
- The pioneer of CNAPS -
one of the most well known commercially available SIMD neurocomputer
(Connected Network of Adaptive Processors -CNAPS) used for various neural
network simulation, image-processing, etc.
Prof. Carver Mead - The pioneer of "neuromorphic hardware" and "silicon retina", and the one who coined the term "neuromorphic" in the 80's
Prof .Anders Lansner - He leads the computational neuroscience platfrom at Stockholm Brain Insitute, and the Dept. of Computational Biology and Neurocomputing at KTH Royal Institute of Technology, Sweden
Prof. Henry Markram - He leads the IBM/EPFL Blue Brain Project, at Ecole Polytechnique Federale de Lausanne, Switzerland
Prof . Kwabena Boahen - He leads the Brains on Silicon group at Stanford University
Prof. Gert Cauwenberghs - Works on the digital and analog VLSI microsystems for adaptive neural computations and sensory information processing.
Dr. Dharmendra Modha - Leads the Cognitive Computing Division at IBM Almaden Research Center, and principal investigator of DARPA's SyNAPSE program
Prof. Konstantin K. Likharev - The pioneer of hybrid nanoelectronic technology CMOL ( = CMOS stacked with a layer of perpendicular nanowire grids with nanodevices at each crosspoint in the grid)
Prof. Tarek Taha - Works on supercomputer and multi-FPGA systems for implementing and accelerating neocortex inspired computational models
Dr. Greg Snider - At HP labs, investigator of HP's FPNI (nano-memristor grid based FPGA architecture)
|Jeff Hawkins, the founder of Numenta Inc. and the Redwood Neuroscience Institute, University of California, Berkeley||Numenta is creating a new type of
computing technology modeled on the structure and operation of the
neocortex. The technology is called Hierarchical
Temporal Memory, or
HTM, and is applicable to a broad class of problems from machine
vision, to fraud detection, to semantic analysis of text. HTM is based
on a theory of neocortex first described in the book On Intelligence by Numenta
co-founder Jeff Hawkins, and subsequently turned into a mathematical
form by Numenta co-founder Dileep
Dr. Dileep George's PhD dissertation - "How the brain might work"
|Most important research programs on Neuromorphic hardware systems||
|Useful datasets for pattern recognition||Data for
Matlab Hackers (by Prof. Sam Roweis)
MNIST Handwritten Character database (by Prof Yann LeCunn)
One proposed interim solution to the above challenges is the use of emerging nanoelectronic technologies, and in particular, hybrid nanotechnologies, such as CMOL. Of course, many of these nanotechnologies are currently in the development stage, and commercial mass production could take at least a decade. Another proposed “architectural solution” is the study of application-specific hardware architectures inspired from biological systems, such as the mammalian or human cortex, etc. Such application-specific hardware architectures/processors have primarily two functions, given as follows:
1) Mimic and/or morph some of the functionality of various parts of the cortex, by implementing the mathematical/computational models provided by the computational or “systems” neuroscientists1. This research/study is mostly intended to advance science, and learn more about how the human brain (cortex) functions, and how it achieves its emergent intelligent behavior.
2) Real-world large-scale (“intelligent signal-processing”) applications in computer vision, image and speech recognition, autonomous navigation/tracking, robotics, sensory/medical data collection, etc. This research/study has enormous commercial applicability and potential, for intelligent applications in embedded devices, such as hand-held devices, cell-phones, PC peripherals, etc.
At the IEEE Centenary in 1984 (“The Next 100 Years,” IEEE Technical Convocation) Dr. Robert Noyce, co-founder of Intel and co-inventor of the Integrated Circuit, said: “Until now we have been going the other way; that is, in order to understand the brain we have used the computer as a model for it. Perhaps it is time to reverse this reasoning: to understand where we should go with the computer, we should look to the brain for some clues.”
My research concentrates on the study/investigation of (custom) application-specific hardware architectures that implement some of the sophisticated computational models of the visual cortex, provided by computational neuroscientists. This investigation focuses on the efficient use of current semiconductor technology and emerging nanotechnology candidates, particularly for implementing (computation and memory intensive) applications/models inspired from neurosciences. Special capabilities, such as the inherent (combined) storage and computation benefits, available from some of the emerging nanoelectronics provides a better match for implementing these biologically-inspired models, potentially providing several times better cost-performance over implementations that use traditional semiconductor technologies.
According to Prof. Anders Lansner2, the ultimate goal3 of researchers (including myself) in the field of neuromorphic or biologically-inspired (electronic) hardware architectures is to “eventually build an ‘artificial electronic brain’ that is the same size as that of the human brain/cortex, operates faster than the brain, and consumes manageable power”. Of course, this goal sounds unfeasible for the next couple of decades, because it still requires enormous research by neuroscientists. However, to test some of the proposed theories/algorithms for the cortex, neuroscientists will require large-scale hardware platforms. As a result, a methodical exploration of the potential (neuromorphic) hardware platforms/architectures is warranted from the electronics/computer engineering perspective. Emerging nanoelectronic technologies, such as CMOL, have shown the potential for implementing mammalian cortex-scale systems, because these technologies will approach biological/cortical densities, have several times better performance, and consume manageable amounts of power.
For the next few years, my research agenda would be to explore the hardware design space (investigate and compare these CMOS/Nano designs) for implementing the models/algorithms from computational neurosciences. My domain is mostly electronics and computer engineering; hence, to study/understand such algorithms, I would also require collaboration with the computer science faculty, working on computational models in machine learning/Artificial Intelligence (AI).
What is the scope of such research in India?
In India, there is ongoing research in neurosciences, for example, at the National Institute of Brain Research (http://www.nbrc.ac.in/), a Govt. of India undertaking. However, research in computational neuroscience, especially from the perspective of real-world applications, seems to be scarce.
Research on neuromorphic or biologically-inspired hardware/VLSI is almost negligible in India. Hence, the domain of neuromorphic hardware/VLSI should provide ample of research opportunities in the future. And with the advent of novel nano-scale electronic devices/circuits, the prospects of research and development in the field of neuromorphic nano-scale hardware/VLSI, and in general, the application/utilization of nano-scale technology, are bright.
To summarize, all these efforts, to study and morph the mammalian cortex, are a part of the larger objective – “Reverse Engineering the Brain”, which is one of the 14 grand challenges of engineering (http://www.engineeringchallenges.org/), of the 21st Century, announced by the National Academy of Engineering of the U.S. National Academy of Sciences, in 2008.
1 Researchers have been studying the mammalian and human cortex, especially the visual cortex, since several decades. Cortex is considered as the “ultimate cognitive processor”, and there is no other better place to look for inspiration. Recently, the computational neuroscience community has started providing sophisticated computational models, which have tremendous potential for real world applications. For example, Numenta Inc.(http://www.numenta.com/) uses neocortex-inspired models for numerous real-world applications.
2 Prof. Anders Lansner leads the computational neuroscience platform at Stockholm Brain Institute (http://www.stockholmbrain.se/), and heads the Computational Biology and Neurocomputing department at the Royal Institute of Technology, Sweden.3 In fact, the “SyNAPSE” program (http://www.darpa.mil/dso/thrusts/bio/biologically/synapse/index.htm) of the Defense Advanced Research Projects Agency (DARPA) of the U.S. Govt., which is currently in its first phase, is the most ambitious project so far on “Brain-on chip”, and it aims at building (artificial) mouse and cat cortex-scale hardware systems using a combination of current technology and emerging nanoelectronic technology (CMOL).